Nine months ago, Intel made Altera — its unit that produces programmable chips — a standalone business — with the intention of spinning it public in 2026.
On Monday, Altera executives showed off new chips at their annual developer conference, making the case for why Altera will dominate programmable chips in years to come.
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“Our goal is to be the number one FPGA solutions provider in the world,” said Altera CEO Sandra Rivera in a press briefing.
“It’s a big, audacious, ambitious goal, but it’s the right goal for us since we’re the only company left in the world that is top to bottom, cloud to edge, FPGAs,” said Rivera, referring to “field-programmable gate arrays” — the programmable chips used across virtually every product in the world that uses chips.
Altera, acquired by Intel in 2015 for $15 billion, is one of a triumvirate of programmable chip makers that came to market in the 1980s, the other two being Xilinx, which was acquired last year by Intel’s arch-rival, Advanced Micro Devices, and Lattice Semiconductor, which remains independent.
The plan, said Rivera, is to take Altera public in 2026, “which is a very fun and important milestone,” she said, “but our our journey really is what happens throughout the next number of years on our path to number 1.”
In reviewing Altera’s successes and failures under Intel, Rivera said the company had been even more successful in applications in cloud computing than originally expected. For example, the “infrastructure processing unit (IPU), which can offload tasks such as storage management from the main CPU of a server, was a positive surprise.”
“That was one we probably didn’t see in 2015,” said Rivera. “And we actually won every single socket that was available in the market for an FPGA” in IPUs, she added.
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On the flip side, “Where we fell short is in thinking that we could do more of that co-packaging of the FPGA with the CPU, because we didn’t realize at that point how much you would be constraining one device or the other device where the customers really want to use both devices at their full potential. So, that value proposition was never realized, and we moved away from that strategy within the first couple of years.”
At the developer conference Monday, Rivera and team made product announcements to cement that lead over Xilinx and Lattice. The company unveiled the latest line of programmable chips, the Agilex 3 family of FPGAs.
The chip family, which will become available the middle of next year, is designed for cost-sensitive and space-constrained applications in markets such as edge computing and robotics.
As Intel details in its press release, “Compared to the previous generation, Agilex 3 FPGAs bring higher levels of integration, enhanced security, and higher performance in a compact package, with densities ranging from 25K-135K logic elements.”
The chips have greater integration of their parts, said Rivera, including two on-board ARM “Cortex A55” CPUs. That enables the Agilex 3, she explained, “to deliver all of those additional capabilities that you’d need in autonomous vehicles and industrial IoT in this very powerful, small device.”
The chips also have greater emphasis placed on their internal connective “fabric” to handle real-time computing tasks. That is important, said Rivera, for “time-sensitive networks, obviously, anything that you don’t have latency to go round-trip to a centralized data center.”
The next level up in performance is Intel’s Agilex 5, which gets a boost in capabilities with a new “D series” announced at the conference as well. The D series “gives us more capability to address more segments” of the programmable-chip market, said Rivera.
Altera has also tripled the number of system boards and reference kits used by partners and resellers of the Agilex chips, noted Rivera. “We’re very excited to see our ecosystem growing, investing with us, and growing the availability of these Agilex 5-based design kits, spanning virtually every use case in the market,” she said.
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To aid developers, Altera has updated its Quartus Prime Pro software, the main development tool. Among the enhancements are speed-ups in compile time, when a developer’s circuit design is downloaded to the programmable chip.
“We have leadership compile times,” noted Rivera. “Over the course of the products we’ve introduced in the last several years around this Agilex, platform, we’ve got almost 30% faster compile times,” she said, “which means that the developer can get maybe an extra turn of an algorithm that they’re trying to test out. That just makes their development time more efficient, from a three-hour compile time down to a two-hour compile time.”
The Quartex software also allows designers to implement Altera’s CPU-alternative, the “Nios V soft-core processor,” which, unlike a hard-wired ARM CPU core, can “be instantiated in the FPGA fabric.”
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The breadth of capabilities is something Rivera hopes will shine with a newly independent Altera. Under Intel, she said, the focus had narrowed to a small set of customers, which didn’t leverage the full potential of the FPGAs.
“We weren’t as invested in building out that distribution network and all of the capabilities, and getting more reach and scale out of the portfolio through our partners,” she said. “And that’s because from an Intel strategy perspective, it was less important than the top 25 customers that make up most of Intel’s revenue.
“And that’s something we get to change now because we’re committed to the entire breadth of use cases, applications, market segments, and capabilities in the portfolio.”
